BERパターン生成とアイ・ダイアグラム解析を結びつけることにより、ビット・エラー・レート検出をよりすばやく、正確に、詳細に実行します。 BERTScopeビット・エラー・レート・テスタ・シリーズは、ビット/パターン・シーケンス問題を容易に分離し、7種類の拡張エラー解析機能により詳細な統計測定を可能にします。



Pattern Generation and Error Analysis, highspeed BER Measurements up to 28.6 Gb/sec. The combination of impairment modulation, signal generation and analysis in one instrument enables receiver BER compliance testing for today's 3rd Generation Serial and 100G standards like; IEEE802.3ba, OIF-CEI and 32GFC communications standards.
Integrated Stress Generator for stressed eye sensitivity (SRS) and jitter tolerance compliance testing. A test signal's data rate, applied stress, and data pattern can be changed on the fly, independent of each other; enabling a diverse set of signal variations for testing chipset/system sensitivity.
Integrated, BER correlated eye diagram analysis with pass/fail masks for PCI Express, USB, SATA and other communications standards. Enhances the debug experience unlike other BERT's by providing a familiar eye diagram of the test results to compare against a standards specific mask.
Error Location and BER contour analysis on PRBS 31 and other digital signals up to 28.6 Gb/sec. Provides a quick understanding of signal integrity in terms of BER. Error location provides detailed BER pattern sensitivities to speed up identification of deterministic vs. random BER errors.
Optional Jitter Map provides fast jitter decomposition, accurate stress calibration at the DUT input. Fast, effective method for determining long pattern PRBS31 jitter composition with triangulation. Graphical representation makes jitter analysis more thorough, yet simpler to follow.
Optional Digital Pre-emphasis Processor provides user controlled pre-emphasis on pattern generator supplied data. Enables testing with compliant signals for standards like OIF-CEI3.0, Infiniband EDR,  PCI Express, 10GBASE-KR, SATA, 40GBASE-KR4, 100GBASE-CAUI.
Optional Clock Recovery Units provide clock recovery up to 28.6 Gb/s. Enables compliant testing and accurate Eye Pattern Analysis for high-speed serial and communication system standards.
Data SheetAccessoryDescription
BSA12500ISI 差動ISIボード
BSARACK BSAラックマウント・キット、安全基準準拠
PMCABLE1M 精密位相マッチング・ケーブル・ペア、1m
BSAPCI3 アイ校正アプリケーション・ソフトウェア 構成/見積り
Tektronix Receiver Test Application Software for USB3.1 Gen1 and Gen2 - V2.3.0
USB 3.1 Gen1 and Gen2: Testing is described in the USB-IF Compliance Test Specification (CTS) document. Receiver testing is accomplished by connecting the output of a BERT pattern generator as an input to the DUT, through a specialized set of fixtures and…
Part number: 066195002
Application 22 Feb 2018
2018 Tektronix and Keithley Product Catalog
Browse the new Tektronix and Keithley Product Catalog and explore our complete line of test and measurement solutions. You will find over 130 pages of key product details and specifications, application information, quick-reference selection guides and…
Selection Guide 21 Feb 2018
BERTScope® BSAシリーズ・データ・シート BERTScopeビット・エラー・レート・テスタ・シリーズは、シリアル・データ・システムのシグナル・インテグリティ測定の新しいアプローチを提供します。BERパターン生成とアイ・ダイアグラム解析を結びつけることにより、ビット・エラー・レート検出をよりすばやく、正確に、詳細に実行します。BERTScopeビット・エラー・レート・テスタ・シリーズは、ビット/パターン・シーケンス問題を容易に分離し、拡張エラー解析機能により詳細な統計測定を可能にします。
Literature number: 65Z-25444-15
データシート 29 Jan 2018
Tektronix Receiver Test Application - V1.0.0.138
The "Tektronix Receiver Test Application" supports test automation of PCIe3.0 and PCIe4.0 CEM devices. This software runs on a PC and connects to a BERTScope equipment via TCP/IP.It uses remote control automation protocols to perform automated…
Part number: 066193300
Application 18 Dec 2017
BERTScope Application Software, V11.02.1903

Part number: 066165804
Application 08 Aug 2017
BSAPCI3 PCIe 3.0 Receiver Test Application Software, V1.1.1449

Part number: 066156501
Application 08 Aug 2017
Bridging the Gap Between BER and Eye Diagrams
Literature number: 65W_26019_0
アプリケーション・ノート 08 Aug 2017
USB 3.1 Receiver Compliance Testing
All aspects of USB 3.1 receiver testing are covered, including stressed eye calibration and jitter tolerance testing with measured device margin.
Literature number: 55W-26804-0
Application Note 08 Aug 2017
High Speed Interface Standards
PCI Express | DDR4 | USB | SAS/SATAThis e-Guide will help you learn more about design challenges for testing PCIe 4.0, SAS, SuperSpeed USB, and DDR4 standards. Within the pages of the eGuide you will also get quick access to technical resources that will help you understand design…
Literature number: 55W-60038-1
How-to Guide 08 Aug 2017
テクトロ、100Gの光レシーバテスト対応のビットエラーレートテスタを発表 -マイナビニュース [2014/05/21]
製品資料 08 Aug 2017


Go to top